Increased performance in and yield of circuit devices on a substrate (e.g., integrated circuit (IC) transistors, resistors, capacitors, etc. on a semiconductor (e.g., silicon) substrate) is typically a major factor considered during design, manufacture, and operation of those devices, or a system on a chip including such devices. For instance, Gallium Nitride (GaN) circuit devices having a GaN channel may be part of a voltage regulator, a power management integrated circuit (IC), a radio frequency (RF) power amplifier, for a system on a chip (SoC) architecture. Design and manufacture (e.g., forming) of such devices may include transistors or transistor layers (e.g., layers of material that are included in or part of a transistor) of a GaN channel metal oxide semiconductor (MOS) devices. Such devices may be a GaN MOS-high electron mobility transistor (HEMT).
Such GaN channel devices may include a gate, a gate dielectric, a source region (e.g., junction region), and a drain region (e.g., junction region). The conductive channel of the device resides beneath the gate dielectric. Specifically, current runs along/within the channel. For a “fin” device or channel, the conductive channel of such configurations essentially resides along the three different outer, planar regions of the fin. There are a number of non-trivial issues associated with fabricating such GaN channel devices or transistors.